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STS14N3LLH5 N-channel 30 V, 0.005 14 A - SO-8 , STripFETTM V Power MOSFET Features Type STS14N3LLH5 VDSS 30 V RDS(on) <0.006 ID 14 A (1) 1. The value is rated according Rthj-pcb RDS(on) * Qg industry benchmark Extremely low on-resistance RDS(on) Very low switching gate charge High avalanche ruggedness Low gate drive power losses SO-8 Application Switching applications Figure 1. Internal schematic diagram Description This product utilizes the 5th generation of design rules of ST's proprietary STripFETTM technology. The lowest available RDS(on)*Qg, in SO-8 package, makes this device suitable for the most demanding DC-DC converter applications, where high power density is to be achieved. Table 1. Device summary Marking 14D3L Package SO-8 Packaging Tape and reel Order code STS14N3LLH5 September 2008 Rev 3 1/12 www.st.com 12 Contents STS14N3LLH5 Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Electrical characteristics (curves) ............................. 6 3 4 5 Test circuit ................................................ 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/12 STS14N3LLH5 Electrical ratings 1 Electrical ratings Table 2. Symbol VDS VGS ID(1) ID (1) IDM (2) (2) Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25 C Drain current (continuous) at TC=100 C Drain current (pulsed) Total dissipation at TC = 25 C Derating factor Value 30 22 14 8.75 56 2.7 0.02 -55 to 150 Unit V V A A A W W/C C PTOT TJ Tstg Operating junction temperature Storage temperature 1. The value is rated according Rthj-pcb 2. Pulse width limited by safe operating area Table 3. Symbol Rthj-pcb (1) Thermal resistance Parameter Thermal resistance junction-ambient Value 47 Unit C/W 1. When mounted on FR-4 board of 1inch, 2oz Cu, t < 10sec Table 4. Symbol IAV EAS Avalanche data Parameter Not-repetitive avalanche current, (pulse width limited by Tj Max) Single pulse avalanche energy (starting TJ = 25 C, ID = IAV , VDD = 24 V) Value 8.5 180 Unit A mJ 3/12 Electrical characteristics STS14N3LLH5 2 Electrical characteristics (TCASE=25C unless otherwise specified) Table 5. Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250 A, VGS= 0 VDS = max rating, VDS =max rating @125 C VGS = 22 V VDS= VGS, ID = 250 A VGS= 10 V, ID= 7 A VGS= 4.5 V, ID= 7 A 1 0.005 0.006 0.0062 0.0077 Min. 30 1 10 100 Typ. Max. Unit V A A nA V Table 6. Symbol Ciss Coss Crss Qg Qgs Qgd Dynamic Parameter Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS = 25 V, f=1 MHz, VGS=0 VDD=15 V, ID = 14 A VGS= 4.5 V (see Figure 14) Min. Typ. 1500 295 39 12 4 4.7 Max. Unit pF pF pF nC nC nC 4/12 STS14N3LLH5 Electrical characteristics Table 7. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD=15 V, ID= 7 A, RG=4.7 , VGS =10 V (see Figure 13) Min. Typ. 9.3 14.5 22.7 4.5 Max. Unit ns ns ns ns Table 8. Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 14 A, VGS=0 ISD = 14 A, di/dt = 100 A/s, VDD= 25 V, Tj=150 C 25 17.5 1.4 Test conditions Min Typ. Max 14 56 1.1 Unit A A V ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300s, duty cycle 1.5% 5/12 Electrical characteristics STS14N3LLH5 2.1 Figure 2. Electrical characteristics (curves) Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. BVDSS (norm) Normalized BVDSS vs temperature HV42950 Figure 7. Static drain-source on resistance 1.1 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 0.92 -55 -30 ID=1 mA -5 20 45 70 95 120 145 TJ(C) 6/12 STS14N3LLH5 Figure 8. VGS(V) 12 ID=14 A 10 2000 Electrical characteristics Capacitance variations HV42930 Gate charge vs gate-source voltage Figure 9. HV42940 C(pF) f=1MHz VGS=0 Ciss 8 6 4 2 0 0 5 10 15 20 Qg(nC) 1500 1000 500 Coss Crss 0 0 10 20 C(pF) Figure 10. Normalized gate threshold voltage vs temperature VGS(th) (norm) Figure 11. Normalized on resistance vs temperature RDS(on) (norm) HV42960 HV42970 ID=7 A 1.2 1 0.8 0.6 0.4 0.2 0 -55 -30 -5 20 45 70 1.8 ID=250 A 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 95 120 145 TJ(C) 0 -55 -30 -5 20 45 70 95 120 145 TJ(C) Figure 12. Source-drain diode forward characteristics HV42980 VSD(V) 0.9 0.8 0.7 0.6 0.5 0.4 0 5 10 15 ISD(A) TJ=150 C TJ=-55 C TJ=25 C 7/12 Test circuit STS14N3LLH5 3 Test circuit Figure 14. Gate charge test circuit Figure 13. Switching times test circuit for resistive load Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 8/12 STS14N3LLH5 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/12 Package mechanical data STS14N3LLH5 SO-8 MECHANICAL DATA DIM. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 10/12 STS14N3LLH5 Revision history 5 Revision history Table 9. Date 12-Nov-2007 15-Apr-2008 23-Sep-2008 Document revision history Revision 1 2 3 First release - Updated Figure 1: Internal schematic diagram - Document status promoted from preliminary data to datasheet. VGS value has been changed on Table 2 and Table 5 Changes 11/12 STS14N3LLH5 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. 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